Stacked capacitors for use in integrated circuit modules and the like
US11004614B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2018 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Dec 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A device including a substrate, an upper capacitor, and a lower capacitor is described. The upper capacitor is mounted on the substrate and includes an upper body and a pillar that extends from the upper body towards the substrate. The lower capacitor includes a lower body that is disposed both lateral to the pillar and at least in part between the upper body and the substrate. Each of the upper capacitor and the lower capacitor is a respective discrete circuit component. Such capacitor stacking configurations facilitate the placement of larger numbers of capacitors in close proximity to microprocessor cores in integrated circuit modules without the need to increase module size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.