Error correction code structure
US11016844B2 · kind B2 · utility
1Cited by
15References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Apr 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/152
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein relate to systems and methods for encoding data having input bits to be stored in a non-volatile storage device, including mapping the input bits to a plurality of component codes of an error correction code (ECC) and encoding the input bits as the plurality of component codes, wherein first input bits of the input bits encoded by any of the plurality of component codes are encoded by every other component code of the plurality of component codes in a non-overlapping manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.