Semiconductor device with epitaxial source/drain
US11018224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2019 |
| Grant date | May 25, 2021 |
| Priority date | — |
| Expiry date | Dec 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A semiconductor device and method of manufacturing the semiconductor device are provided. In some embodiments, the semiconductor device includes a fin extending from a substrate and a gate structure disposed over the fin. The gate structure includes a gate dielectric formed over the fin, a gate electrode formed over the gate dielectric, and a sidewall spacer formed along a sidewall of the gate electrode. In some cases, a U-shaped recess is within the fin and adjacent to the gate structure. A first source/drain layer is conformally formed on a surface of the U-shaped recess, where the first source/drain layer extends at least partially under the adjacent gate structure. A second source/drain layer is formed over the first source/drain layer. At least one of the first and second source/drain layers includes silicon arsenide (SiAs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.