Semiconductor device having a die pad with a dam-like configuration
US11031321B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2019 |
| Grant date | Jun 8, 2021 |
| Priority date | — |
| Expiry date | Mar 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/92246
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate, a power transistor formed in the semiconductor substrate, the power transistor including an active area in which one or more power transistor cells are formed, a first metal pad formed above the semiconductor substrate and covering substantially all of the active area of the power transistor, the first metal pad being electrically connected to a source or emitter region in the active area of the power transistor, the first metal pad including an interior region laterally surrounded by a peripheral region, the peripheral region being thicker than the interior region, and a first interconnect plate or a semiconductor die attached to the interior region of the first metal pad by a die attach material. Corresponding methods of manufacture are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.