SRAM bit cells formed with dummy structures
US11037937B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2019 |
| Grant date | Jun 15, 2021 |
| Priority date | — |
| Expiry date | Nov 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
Structures including static random access memory bit cells and methods of forming a structure including static random access memory bit cells. A first bit cell includes a first plurality of semiconductor fins, and a second bit cell includes a second plurality of semiconductor fins. A deep trench isolation region is laterally positioned between the first plurality of semiconductor fins of the first bit cell and the second plurality of semiconductor fins of the second bit cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.