Sigma-delta analog-to-digital converter circuit with correction for mismatch error introduced by the feedback digital-to-analog converter
US11043960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2020 |
| Grant date | Jun 22, 2021 |
| Priority date | — |
| Expiry date | Jun 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sigma-delta modulator includes an N-bit quantization circuit that generates a stream of N-bit code words and a feedback signal path with an N-bit DAC circuit, having a non-ideal operation due to mismatch error, that converts the stream of N-bit code words to generate a feedback signal. A digital DAC copy circuit provides a digital replication of the N-bit DAC circuit. The digital replication accounts for the non-ideal operation of the N-bit DAC circuit 126 due to mismatch error, and converts the stream of N-bit code words to generate a stream of P-bit code words, where P>N, that are functionally equivalent to the feedback signal output from the N-bit DAC circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.