Non-sequential page continuous read
US11048649B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 19, 2019 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Aug 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/214
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device such as a page mode NAND flash including a page buffer, and an input/output interface for I/O data units having an I/O width less than the page width supports continuous page read with non-sequential addresses. A controller controls a continuous page read operation to output a stream of pages at the I/O interface. The continuous read operation includes responding to a series of commands to output a continuous stream of pages. The series of commands including a first command and a plurality of intra-stream commands received before completing output of a preceding page in the stream. The first command includes an address to initiate the continuous page read operation, and at least one intra-stream command in the plurality of intra-stream commands includes a non-sequential address to provide the non-sequential page in the stream of pages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.