Memory programming techniques
US11061762B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2019 |
| Grant date | Jul 13, 2021 |
| Priority date | — |
| Expiry date | Jun 27, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device that has been programmed to store a single bit or multiple bits can perform a determination of a number of threshold voltages in one or more threshold voltage level regions. Based on the number of threshold voltages meeting or exceeding a threshold level, a page of bits can be read and if the bit error rate of the page of bits is below a threshold rate, the page of bits can be stored in the cells together with other bits stored in the cells and a provided additional page of bits. However, if the bit error rate of the page of bits is at or above the threshold rate, then the bit or bits stored in the cells can be error corrected and stored together with a provided additional page of bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.