Method of reducing effective oxide thickness in a semiconductor structure

US11062900B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Luping Li · Cixi City, CN
• Shih Chung Chen · Hsinchu, TW
• Kazuya Daito · Milpitas, US
• Lin Dong · Sunnyvale, US
• Zhebo Chen · San Jose, US
• Yixiong Yang · San Jose, US
• Steven C. H. Hung · Sunnyvale, US

Key dates

• Filing date: Dec 1, 2019
• Grant date: Jul 13, 2021
• Expiry date: Dec 1, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.