Power shared cell architecture
US11068640B2 · kind B2 · utility
1Cited by
1References
25Claims
0Family size
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Key dates
| Filing date | Dec 28, 2017 |
| Grant date | Jul 20, 2021 |
| Priority date | — |
| Expiry date | Dec 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure includes a metal level comprising a plurality of interconnect lines along a first direction. A cell is on the metal level, wherein one or more of the plurality of interconnect lines that extend through the cell comprise a power shared track that is segmented inside the cell into one or more power segments and one or more signal segments so that both power and signals share a same track.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.