Patent · US Active

Integrated assemblies comprising digit lines configured to have shunted ends during a precharge operation

US11074964B1 · kind B1 · utility

7Cited by

7References

28Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Christopher John Kawamura · Boise, US
Jiyun Li · Boise, US

Key dates

Filing date	Mar 20, 2020
Grant date	Jul 27, 2021
Priority date	—
Expiry date	Mar 20, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/50
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Some embodiments include an integrated assembly having a first digit line coupled with SENSE AMPLIFIER circuitry. The first digit line has a first region distal from the SENSE AMPLIFIER circuitry. A second digit line is coupled with the SENSE AMPLIFIER circuitry and has a second region distal from the SENSE AMPLIFIER circuitry. PRECHARGE circuitry includes one or more first equalization transistors proximate the first and second regions, and includes a second equalization transistor proximate the SENSE AMPLIFIER circuitry. Some embodiments include an integrated assembly having a first digit line coupled with SENSE AMPLIFIER circuitry. The first digit line has a first region distal from the SENSE AMPLIFIER circuitry. A second digit line is coupled with the SENSE AMPLIFIER circuitry and has a second region distal from the SENSE AMPLIFIER circuitry. PRECHARGE circuitry includes an electrical connection coupling the first and second regions to one another.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.