Inventor · Boise, ID, US

Christopher John Kawamura

96Patents
12h-index
22Co-inventors
76Inventor score

Filing activity: Feb 1, 2016 → Oct 27, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US9858979B1 Reprogrammable non-volatile ferroelectric latch for use with a memory controller Physics 86 Active
US10354712B2 Ferroelectric memory cells Physics 70 Active
US9786348B1 Dynamic adjustment of memory cell digit line capacitance Physics 51 Active
US9715918B1 Power reduction for a sensing operation of a memory cell Physics 34 Active
US10153018B2 Ferroelectric memory cells Physics 32 Active
US10074414B2 Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory Electricity 24 Active
US10163480B1 Periphery fill and localized capacitance Electricity 21 Active
US10127972B2 Apparatuses and methods including two transistor-one capacitor memory and for accessing same Electricity 17 Active
US10127965B2 Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory Physics 17 Active
US9721638B1 Boosting a digit line voltage for a write operation Physics 16 Active
US9786347B1 Cell-specific reference generation and sensing Physics 14 Active
US9734886B1 Cell-based reference voltage generation Physics 13 Active
US10431283B2 Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory Physics 11 Active
US10074415B2 Boosting a digit line voltage for a write operation Physics 11 Active
US10418083B2 Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory Electricity 11 Active
US9792973B2 Ferroelectric memory cell sensing Physics 8 Active
US10535397B1 Sensing techniques for multi-level cells Electricity 8 Active
US10872650B2 Ferroelectric memory cells Physics 7 Active
US11074964B1 Integrated assemblies comprising digit lines configured to have shunted ends during a precharge operation Electricity 7 Active
US10854276B2 Apparatuses and methods including two transistor-one capacitor memory and for accessing same Electricity 7 Active
US9899073B2 Multi-level storage in ferroelectric memory Physics 6 Active
US10861787B1 Memory device with bitline noise suppressing scheme Physics 5 Active
US9990977B2 Power reduction for a sensing operation of a memory cell Physics 5 Active
US10885964B2 Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory Electricity 4 Active
US11211113B1 Integrated assemblies comprising wordlines having ends selectively shunted to low voltage for speed transitioning Physics 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.