Method for processing a substrate assembly and wafer composite structure
US11081382B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2020 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Jun 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for processing a substrate assembly with a semiconductor device layer includes: arranging an auxiliary carrier at the substrate assembly such that a connection surface of the auxiliary carrier and a first surface of the substrate assembly directly adjoin each other; fixedly attaching the auxiliary carrier to the substrate assembly by melting a carrier portion of the auxiliary carrier and a substrate portion of the substrate assembly that directly adjoins the carrier portion such that the auxiliary carrier and the substrate assembly locally fuse only in fused portions of the auxiliary carrier and the substrate assembly, wherein the fused portions are laterally separated from each other by at least one unfused portion; and processing the semiconductor device layer of the substrate assembly with the auxiliary carrier fixedly attached to the substrate assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.