Methods and systems for manufacturing pillar structures on semiconductor devices
US11081460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2018 |
| Grant date | Aug 3, 2021 |
| Priority date | — |
| Expiry date | Dec 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/35121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device having a conductive substrate having a first surface, a second surface opposite the first surface, and a passivation material covering a portion of the first surface can include applying a seed layer of conductive material to the first surface of the conductive substrate and to the passivation material, the seed layer having a first face opposite the conductive substrate. The method can include forming a plurality of pillars comprising layers of first and second materials. The method can include etching the seed layer to undercut the seed layer between the conductive substrate and the first material of at least one of the pillars. In some embodiments, a cross-sectional area of the seed layer in contact with the passivation material between the first material and the conductive substrate is less than the cross-sectional area of the second material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.