Redistribution structures in semiconductor packages and methods of forming same
US11101209B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2018 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Nov 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.