Power semiconductor device
US11101384B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2020 |
| Grant date | Aug 24, 2021 |
| Priority date | — |
| Expiry date | Oct 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A power semiconductor device includes a substrate, a first well, a second well, a drain, a source, a first gate structure, a second gate structure and a doping region. The first well has a first conductivity and extends into the substrate from a substrate surface. The second well has a second conductivity and extends into the substrate from the substrate surface. The drain has the first conductivity and is disposed in the first well. The source has the first conductivity and is disposed in the second well. The first gate structure is disposed on the substrate surface and at least partially overlapping with the first well and second well. The second gate structure is disposed on the substrate surface and overlapping with the second well. The doping region has the first conductivity, is disposed in the second well and connects the first gate structure with the second gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.