Preserving underlying dielectric layer during MRAM device formation
US11121173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Oct 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques for preserving the underlying dielectric layer during MRAM device formation are provided. In one aspect, a method of forming an MRAM device includes: depositing a first dielectric cap layer onto a substrate over logic and memory areas of the substrate; depositing a sacrificial metal layer onto the first dielectric cap layer; patterning the sacrificial metal layer, wherein the patterned sacrificial metal layer is present over the first dielectric cap layer in at least the logic area; depositing a second dielectric cap layer onto the first dielectric cap layer; forming an MRAM stack on the second dielectric cap layer; patterning the MRAM stack using ion beam etching into at least one memory cell, wherein the patterned sacrificial metal layer protects the first dielectric cap layer in the logic area; and removing the patterned sacrificial metal layer. An MRAM device is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.