In-memory computing devices for neural networks
US11138497B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2018 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Sep 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/77
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An in-memory computing device includes a plurality of synaptic layers including a first type of synaptic layer and a second type of synaptic layer. The first type of synaptic layer comprises memory cells of a first type of memory cell and the second type of synaptic layer comprises memory cells of a second type, the first type of memory cell being different than the second type of memory cell. The first and second types of memory cells can be different types of memories, have different structures, different memory materials, and/or different read/write algorithms, any one of which can result in variations in the stability or accuracy of the data stored in the memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.