Methods of forming a FinFET device

US11139432B1 · kind B1 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Chang-Miao Liu · Hsinchu, TW
• Bwo-Ning Chen · Keelung, TW
• Kei-Wei Chen · Tainan, TW

Key dates

• Filing date: Apr 1, 2020
• Grant date: Oct 5, 2021
• Expiry date: Apr 1, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B63/30

Abstract

A method of forming a semiconductor device includes patterning a mask layer and a semiconductor material to form a first fin and a second fin with a trench interposing the first fin and the second fin. A first liner layer is formed over the first fin, the second fin, and the trench. An insulation material is formed over the first liner layer. A first anneal is performed, followed by a first planarization of the insulation material to form a first planarized insulation material. After which, a top surface of the first planarized insulation material is over a top surface of the mask layer. A second anneal is performed, followed by a second planarization of the first planarized insulation material to form a second planarized insulation material. The insulation material is etched to form shallow trench isolation (STI) regions, and a gate structure is formed over the semiconductor material.