Quality of service for input/output memory management unit
US11144473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2018 |
| Grant date | Oct 12, 2021 |
| Priority date | — |
| Expiry date | Apr 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.