Conductive via and metal line end fabrication and structures resulting therefrom

US11145541B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Charles H. Wallace · Portland, US
• Reken Patel · Portland, US
• Hyunsoo Park · Seoul, KR
• Mohit K. HARAN · Hillsboro, US
• Debashish Basu · Beaverton, US
• Curtis W. Ward · Hillsboro, US
• Ruth A. Brain · Portland, US

Key dates

• Filing date: Sep 30, 2017
• Grant date: Oct 12, 2021
• Expiry date: Sep 30, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L23/5226
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Conductive via and metal line end fabrication is described. In an example, an interconnect structure includes a first inter-layer dielectric (ILD) on a hardmask layer, where the ILD includes a first ILD opening and a second ILD opening. The interconnect structure further includes an etch stop layer (ESL) on the ILD layer, where the ESL includes a first ESL opening aligned with the first ILD opening to form a first via opening, and where the ESL layer includes a second ESL opening aligned with the second ILD opening. The interconnect structure further includes a first via in the first via opening, a second ILD layer on the first ESL, and a metal line in the second ILD layer, where the metal line is in contact with the first via, and where the metal line includes a first metal opening, and where the metal line includes a second metal opening aligned with the second ILD opening and the ESL opening to form a second via opening. The interconnect structure further includes a metal line end in the first metal opening and further includes a second via in the metal line, where the second via is in the second via opening.