Integrated circuit including bipolar transistors
US11152430B2 · kind B2 · utility
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1References
20Claims
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Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Oct 19, 2021 |
| Priority date | — |
| Expiry date | Jul 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/826
Abstract
The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.