Instruction prefetch based on thread dispatch commands
US11157283B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2019 |
| Grant date | Oct 26, 2021 |
| Priority date | — |
| Expiry date | Apr 3, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing device comprises a set of compute units to execute multiple threads of a workload, a cache coupled with the set of compute units, and a prefetcher to prefetch instructions associated with the workload. The prefetcher is configured to use a thread dispatch command that is used to dispatch threads to execute a kernel to prefetch instructions, parameters, and/or constants that will be used during execution of the kernel. Prefetch operations for the kernel can then occur concurrently with thread dispatch operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.