Semiconductor device package having continously formed tapered protrusions
US11164756B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2020 |
| Grant date | Nov 2, 2021 |
| Priority date | — |
| Expiry date | Mar 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15159
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate. A distance between the second surface of the substrate and an extension of the second surface of the semiconductor device on the first surface of the substrate is less than or equal to twice a distance between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate extends along at least three sides of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.