Hexadecimal exponent alignment for binary floating point unit
US11175890B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2019 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Dec 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30025
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples of techniques for hexadecimal exponent alignment for a binary floating point unit (BFU) of a computer processor are described herein. An aspect includes receiving, by the BFU, a first operand comprising a first fraction and a first exponent, and a second operand comprising a second fraction and a second exponent. Another aspect includes, based on the first operand and the second operand being in a first floating point format, multiplying each of the first exponent and the second exponent by a factor corresponding to a number of bits in a digit in the first floating point format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.