Cognitive binary coded decimal to binary number conversion hardware for evaluating a preferred instruction variant based on feedback
US11175921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2018 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Mar 3, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided. The method is executable by a processor. The method includes receiving, by an instruction issue unit of the processor as an input, a preferred instruction variant from an instruction variant selection logic. The method includes executing, by an execution unit of the processor, the preferred instruction variant. The method includes providing, by the execution unit of the processor, quality feedback to the instruction variant selection logic and evaluating, by the instruction variant selection logic of the processor, the preferred instruction variant based on the quality feedback.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.