Performing in-memory computing based on multiply-accumulate operations using non-volatile memory arrays
US11189339B1 · kind B1 · utility
1Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 2020 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | May 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes: a memory array including a plurality of memory cells and a plurality of bit lines; and a current converting circuit, coupled to the memory array. In executing a calculation operation, the memory cells of the memory array generate a source current corresponding to a calculation operation result. The source current is converted by the current converting circuit into an output value for being an input signal provided to a next calculation operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.