FinFET structure with airgap and method of forming the same
US11189706B2 · kind B2 · utility
3Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2020 |
| Grant date | Nov 30, 2021 |
| Priority date | — |
| Expiry date | Feb 15, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin formed on a substrate; and a gate structure disposed over a channel region of the semiconductor fin, the gate structure including a gate dielectric layer and a gate electrode, wherein the gate dielectric layer includes a bottom portion and a side portion, and the gate electrode is separated from the side portion of the gate dielectric layer by a first air gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.