Chip testing method for testing chips by chip testing system
US11193971B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2020 |
| Grant date | Dec 7, 2021 |
| Priority date | — |
| Expiry date | Apr 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip testing method for being implemented by a chip testing system includes: a chip mounting step implemented by using a chip mounting apparatus to respectively dispose a plurality of chips onto electrical connection sockets of a chip testing device; a moving-in step implemented by transferring the chip testing device carrying the chips into one of accommodating chambers of an environment control apparatus; a temperature adjusting step implemented by controlling a temperature adjusting device of the one of the accommodating chambers so that the chips are in an environment having a predetermined temperature; and a testing step implemented by providing electricity to the chip testing device, so that each testing module of the chip testing device performs a predetermined testing process on the chips on the corresponding electrical connection sockets connected thereto.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.