Memory device and method for forming the same
US11195847B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2019 |
| Grant date | Dec 7, 2021 |
| Priority date | — |
| Expiry date | Jul 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A memory device includes a substrate; a stack including a plurality of conductive layers and a plurality of insulating layers being alternatively stacked on the substrate; a plurality of memory structures formed on the substrate and penetrating the stack; a plurality of isolation structures formed on the substrate and penetrating the stack, wherein the isolation structures dividing the memory structures into a plurality of first memory structures and a plurality of second memory structures; and a plurality of common source pillars formed on the substrate and penetrating the stack, wherein the common source pillars directly contact the isolation structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.