Patent · US Active

Memory multiplexing techniques

US11200922B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Sriram Thyagarajan · Austin, US
Andy Wangkun Chen · Austin, US
Yew Keong Chong · Austin, US
Munish Kumar · Sindhar, IN

Key dates

Filing date	Dec 23, 2019
Grant date	Dec 14, 2021
Priority date	—
Expiry date	Jan 29, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/76
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are related to a device having memory circuitry and multiplexer circuitry. The memory circuitry may include a single bank of memory cells that are arranged in multiple columns, and each column of the multiple columns may provide singe-bit data. The multiplexer circuitry may include multiplexer logic that receives the single-bit data from each column of the multiple columns and provides selected data as output data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.