Andy Wangkun Chen
77Patents
5h-index
99Co-inventors
75Inventor score
Filing activity: Sep 16, 2002 → Dec 30, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10083269B2 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Physics | 31 | Active |
| US6817523B2 | Memory card adapter structure | Physics | 13 | Expired |
| US9142266B2 | Memory circuitry using write assist voltage boost | Physics | 10 | Active |
| US10796053B2 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Physics | 5 | Active |
| US11328750B1 | Bitcell architecture with buried ground rail | Electricity | 5 | Active |
| US9891976B2 | Error detection circuitry for use with memory | Physics | 5 | Active |
| US10978141B1 | Configurable integrated circuits | Physics | 4 | Active |
| US11288432B2 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Physics | 4 | Active |
| US10817420B2 | Apparatus and method to access a memory location | Physics | 3 | Active |
| US9627022B2 | Double pumped memory techniques | Physics | 3 | Active |
| US11271567B1 | Buried metal technique for critical signal nets | Electricity | 3 | Active |
| US9721624B2 | Memory with multiple write ports | Physics | 2 | Active |
| US9741410B2 | Memory circuitry using write assist voltage boost | Physics | 2 | Active |
| US11557583B2 | Cell architecture | Electricity | 2 | Active |
| US9281027B1 | Test techniques in memory devices | Physics | 2 | Active |
| US11568926B2 | Latch circuitry for memory applications | Physics | 1 | Active |
| US11322197B1 | Power-gating techniques with buried metal | Physics | 1 | Active |
| US10847211B2 | Latch circuitry for memory applications | Physics | 1 | Active |
| US11056183B2 | Multi-port memory circuitry | Electricity | 1 | Active |
| US11087834B2 | Read and write techniques | Physics | 1 | Active |
| US11017142B1 | Methods and apparatuses of configurable integrated circuits | Physics | 1 | Active |
| US10984863B2 | Error detection and correction circuitry | Physics | 1 | Active |
| US11211111B1 | CAM device with 3D CAM cells | Physics | 1 | Active |
| US10535386B2 | Level shifter with bypass | Physics | 0 | Active |
| US11005461B2 | Level shift latch circuitry | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.