Three-dimensional memory device with static random-access memory
US11200935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Sep 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of 3D memory devices with a static random-access memory (SRAM) and fabrication methods thereof are disclosed herein. In one example, the method for operating a 3D memory device having an input/output circuit, an array of SRAM cells, and an array of 3D NAND memory strings in a same chip. The method may include transferring data through the input/output circuit to the array of SRAM cells, storing the data in the array of SRAM cells, and programming the data into the array of 3D NAND memory strings from the array of SRAM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.