Semiconductor package having a spacer with a junction cooling pipe
US11201105B2 · kind B2 · utility
0Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2020 |
| Grant date | Dec 14, 2021 |
| Priority date | — |
| Expiry date | Feb 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/1094
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.