Memory with expandable row width
US11205477B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2020 |
| Grant date | Dec 21, 2021 |
| Priority date | — |
| Expiry date | Aug 18, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory device includes initiating an access operation to a corresponding row of an array of bit cells of the memory device. Responsive to an expansion mode signal having a first state, the method further includes dynamically operating each column of a plurality of columns of the array to access each bit cell of a corresponding row within the plurality of columns during the access operation. Alternatively, responsive to the expansion mode state signal having a second state different than the first state, the method includes dynamically operating each column of a first subset of columns of the plurality of columns to access each bit cell of a corresponding row within the first subset of columns during the access operation, and maintaining each column of a second subset of columns of the plurality of columns in a static state during the access operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.