Multiple input signature register analysis for digital circuitry

US11209481B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Naman Maheshwari · Ghaziabad, IN
• Wilson Pradeep · Savanuru, IN
• Prakash Narayanan · Bengaluru, IN

Key dates

• Filing date: Dec 12, 2018
• Grant date: Dec 28, 2021
• Expiry date: Dec 12, 2038

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31937
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A system includes a multiple input signature register (MISR) to receive outputs from M different scan chains in response to N test patterns applied to test an integrated circuit. The MISR provides N test signatures for the integrated circuit based on the outputs of the M different scan chains generated in response to each of the N test patterns. Each of the scan chains holds one or more test data bits that represent behavior of the integrated circuit in response to each of the N test patterns. A shift register is loaded from an interface and holds one of N comparison signatures that is used to validate a respective one of the N test signatures generated according to a given one of the N test patterns. A comparator compares each of the N test signatures with a respective one of the N comparison signatures to determine a failure condition based on the comparison.