Performing threshold voltage offset bin selection by package for memory devices
US11211128B1 · kind B1 · utility
4Cited by
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20Claims
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Key dates
| Filing date | Oct 2, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Oct 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with the memory device; program a first block in a first die of the memory device and a second block in a second die of the memory device, wherein the first die and the second die are assigned to a die group; associate the first block and the second block with the block family; and associate the die group with a first threshold voltage offset bin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.