Power semiconductor package and method for fabricating a power semiconductor package

US11211356B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Wee Aun Jason Lim · Melaka City, MY
• Paul Armand Asentista Calo · Melaka City, MY
• Ting Soon Chin · Melaka City, MY
• Chooi Mei Chong · Melaka City, MY
• Sanjay Kumar Murugan · Melaka City, MY
• Ying Pok Sam · Melaka City, MY
• Chee Voon Tan · Seremban, MY

Key dates

• Filing date: Aug 12, 2020
• Grant date: Dec 28, 2021
• Expiry date: Aug 12, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2224/8492
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A power semiconductor package includes a power semiconductor chip, an electrical connector arranged at a first side of the power semiconductor chip and having a first surface that is coupled to a power electrode of the power semiconductor chip, an encapsulation body at least partially encapsulating the power semiconductor chip and the electrical connector, and an electrical insulation layer arranged at a second surface of the electrical connector opposite the first surface, wherein parts of the encapsulation body and the electrical insulation layer form a coplanar surface of the power semiconductor package.