Patent · US Active

FinFET with shorter fin height in drain region than source region and related method

US11211453B1 · kind B1 · utility

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7References
9Claims
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Assignee

Inventors

Key dates

Filing dateJul 23, 2020
Grant dateDec 28, 2021
Priority date
Expiry dateJul 23, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

A FinFET includes a semiconductor fin, and a source region and a drain region in the same semiconductor fin. The drain region has a first fin height above a trench isolation; and the source region has a second fin height above the trench isolation. The first fin height is less than the second fin height. The FinFET may be used, for example, in a scaled laterally diffused metal-oxide semiconductor (LDMOS) application, and exhibits reduced parasitic capacitance for improved radio frequency (RF) performance. A drain extension region may have the first fin height, and a channel region may have the second fin height. A method of making the FinFET is also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.