Semiconductor device package and a method of manufacturing the same
US11211536B2 · kind B2 · utility
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3References
2Claims
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Key dates
| Filing date | Apr 29, 2020 |
| Grant date | Dec 28, 2021 |
| Priority date | — |
| Expiry date | Apr 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/856
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device package includes a carrier, a semiconductor device, a lid, a conductive post, a first patterned conductive layer, a conductive element disposed between the first conductive post and the first patterned conductive layer, and an adhesive layer disposed between the lid and the carrier. The conductive post is electrically connected to the first patterned conductive layer. The semiconductor device is electrically connected to the first patterned conductive layer. The lid is disposed on the carrier, and the lid includes a second patterned conductive layer electrically connected to the first conductive post.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.