Pillar-based memory hardmask smoothing and stress reduction

US11223008B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Michael Rizzolo · Delmar, US
• Theodorus E. Standaert · Clifton Park, US
• Ashim Dutta · Clifton Park, US
• Dominik Metzler · Clifton Park, US

Key dates

• Filing date: Nov 27, 2019
• Grant date: Jan 11, 2022
• Expiry date: Mar 11, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B63/10

Abstract

A method for fabricating a semiconductor device includes forming a conductive shell layer along a memory stack and a patterned hardmask disposed on the memory stack, and etching the patterned hardmask, the conductive shell layer and the memory stack to form a structure including a central core surrounded by a conductive outer shell disposed on a patterned memory stack.