In memory logic functions using memory arrays
US11233510B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2018 |
| Grant date | Jan 25, 2022 |
| Priority date | — |
| Expiry date | Apr 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, apparatuses, and methods for efficiently performing operations system are disclosed. A computing system uses a memory for storing data, and one or more processing units. The memory includes multiple rows for storing the data with each intersection of a row and a column being a memory bit cell. The memory processes operations. For particular operations, the two or more operands are accessed simultaneously for generating a result without being read out and stored. Two indications are generated specifying at least a first row and a second row targeted by the operation. The memory generates a result by performing the operation for each of the one or more cells in the first row a stored value with a respective stored value in the one or more cells in the second row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.