Terminal structure of a power semiconductor device
US11239188B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2017 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | Oct 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor device includes a semiconductor body configured to conduct a load current. A load terminal electrically connected with the semiconductor body is configured to couple the load current into and/or out of the semiconductor body. The load terminal includes a metallization having a frontside and a backside. The backside interfaces with a surface of the semiconductor body. The frontside is configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current. The frontside has a lateral structure formed at least by at least one local elevation of the metallization. The local elevation has a height in an extension direction defined by a distance between the base and top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.