Thin film transistor based memory cells on both sides of a layer of logic devices

US11239238B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Wilfred Gomes · Portland, US
• Mauro J. Kobrinsky · Portland, US
• Conor P. Puls · Portland, US
• Kevin J. Fischer · Hillsboro, US
• Bernhard Sell · Dresden, DE
• Abhishek A. Sharma · Hillsboro, US
• Tahir Ghani · Portland, US

Key dates

• Filing date: Oct 29, 2019
• Grant date: Feb 1, 2022
• Expiry date: Nov 26, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/60
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Described herein are IC devices that include TFT based memory arrays on both sides of a layer of logic devices. An example IC device includes a support structure (e.g., a substrate) on which one or more logic devices may be implemented. The IC device further includes a first memory cell on one side of the support structure, and a second memory cell on the other side of the support structure, where each of the first memory cell and the second memory cell includes a TFT as an access transistor. Providing TFT based memory cells on both sides of a layer of logic devices allows significantly increasing density of memory cells in a memory array having a given footprint area, or, conversely, significantly reducing the footprint area of the memory array with a given memory cell density.