Wilfred Gomes
48Patents
4h-index
76Co-inventors
58Inventor score
Filing activity: Jul 2, 2016 → Mar 25, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11018264B1 | Three-dimensional nanoribbon-based logic | Electricity | 10 | Active |
| US11087832B1 | Three-dimensional nanoribbon-based static random-access memory | Electricity | 7 | Active |
| US11239238B2 | Thin film transistor based memory cells on both sides of a layer of logic devices | Electricity | 6 | Active |
| US11257822B2 | Three-dimensional nanoribbon-based dynamic random-access memory | Electricity | 5 | Active |
| US11024601B2 | Hyperchip | Electricity | 3 | Active |
| US11335686B2 | Transistors with back-side contacts to create three dimensional memory and logic | Electricity | 2 | Active |
| US11056492B1 | Dense memory arrays utilizing access transistors with back-side contacts | Electricity | 2 | Active |
| US11387198B2 | Device, system and method for providing inductor structures | Electricity | 2 | Active |
| US10784204B2 | Rlink—die to die channel interconnect configurations to improve signaling | Electricity | 2 | Active |
| US10685947B2 | Distributed semiconductor die and package architecture | Electricity | 1 | Active |
| US11373987B2 | Device, method and system for providing a stacked arrangement of integrated circuit dies | Emerging Cross-Sectional Technologies | 1 | Active |
| US11824041B2 | Hyperchip | Electricity | 1 | Active |
| US11894359B2 | Distributed semiconductor die and package architecture | Electricity | 1 | Active |
| US11139300B2 | Three-dimensional memory arrays with layer selector transistors | Electricity | 1 | Active |
| US11257804B2 | Distributed semiconductor die and package architecture | Electricity | 1 | Active |
| US12406956B2 | Bilayer memory stacking with computer logic circuits shared between bottom and top memory layers | Electricity | 0 | Active |
| US12400997B2 | Hybrid manufacturing with modified via-last process | Electricity | 0 | Active |
| US12432897B2 | Cooling approaches for stitched dies | Electricity | 0 | Active |
| US11756886B2 | Hybrid manufacturing of microeletronic assemblies with first and second integrated circuit structures | Electricity | 0 | Active |
| US12074138B2 | Hyperchip | Electricity | 0 | Active |
| US12197007B2 | Multi-layered optical integrated circuit assembly with a monocrystalline waveguide and lower crystallinity bonding layer | Physics | 0 | Active |
| US12396155B2 | Backend memory with air gaps in upper metal layers | Electricity | 0 | Active |
| US12310032B2 | Stacked backend memory with resistive switching devices | Electricity | 0 | Active |
| US12058849B2 | Three-dimensional nanoribbon-based dynamic random-access memory | Electricity | 0 | Active |
| US12176147B2 | Three-dimensional capacitors with double metal electrodes | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.