Coating for chamber particle reduction

US11251024B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Hsin-wei Tseng · San Jose, US
• Casey Jane Madsen · San Jose, US
• Yikai Chen · San Jose, US
• Irena H. Wysok · San Jose, US
• Halbert Chong · San Jose, US

Key dates

• Filing date: Jul 20, 2020
• Grant date: Feb 15, 2022
• Expiry date: Jul 20, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01J2237/332
• WIPO field: Electrical machinery, apparatus, energy
• WIPO sector: Electrical engineering

Abstract

Embodiments generally relate to a chamber component to be used in plasma processing chambers for semiconductor or display processing. In one embodiment, a chamber component includes a textured surface having a surface roughness ranging from about 150 microinches to about 450 microinches and a coating layer disposed on the textured surface. The coating layer may be a silicon layer having a purity ranging from about 90 weight percent to about 99 weight percent, a thickness ranging from about 50 microns to about 500 microns, and an electrical resistivity ranging from about 1 E-3 ohm*m to about 1 E3 ohm*m. The coating layer provides strong adhesion for materials deposited in the plasma processing chamber, which reduces the materials peeling from the chamber component. The coating layer also enables oxygen plasma cleaning for further reducing materials deposited on the chamber component and provides the protection of the textured surface located therebelow.