Method of programming memory device and related memory device
US11257545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2021 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Feb 26, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a memory device which includes a plurality of memory cells, a top dummy storage region, a bottom dummy storage region, a plurality of word lines and a plurality of bit lines form in a substrate, a selected bit line among the plurality of bit lines, a channel region in the substrate and a source region in the substrate are pre-charged and a negative pre-pulse voltage is applied to the bottom dummy storage region during a first period. A selected memory cell among the plurality of memory cells is programmed during a second period subsequent to the first period, wherein the selected memory cell is coupled to the selected bit line and a selected word line among the plurality of word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.