Yali Song
33Patents
3h-index
26Co-inventors
55Inventor score
Filing activity: Mar 27, 2019 → Nov 13, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10950623B2 | 3D NAND memory device and method of forming the same | Electricity | 8 | Active |
| US10998049B1 | Method of programming memory device and related memory device | Physics | 4 | Active |
| US10991438B1 | Method and memory used for reducing program disturbance by adjusting voltage of dummy word line | Electricity | 4 | Active |
| US10957408B1 | Non-volatile memory device and control method | Physics | 3 | Active |
| US10892023B2 | Three-dimensional memory device programming with reduced disturbance | Electricity | 2 | Active |
| US11062782B2 | Three-dimensional memory device programming with reduced disturbance | Electricity | 2 | Active |
| US10957409B1 | Method of performing programming operation and related memory device | Physics | 2 | Active |
| US11430811B2 | 3D NAND memory device with select gate cut | Electricity | 1 | Active |
| US10885990B1 | Method of performing programming operation and related memory device | Physics | 1 | Active |
| US11710529B2 | Three-dimensional memory device programming with reduced disturbance | Physics | 1 | Active |
| US10943665B1 | Method of programming and verifying memory device and related memory device | Physics | 1 | Active |
| US11404441B2 | 3D NAND memory device and method of forming the same | Electricity | 1 | Active |
| US11276467B2 | Method of programming memory device and related memory device having a channel-stacked structure | Physics | 1 | Active |
| US11721403B2 | Method of programming and verifying memory device and related memory device | Physics | 0 | Active |
| US11825656B2 | 3D NAND memory device and method of forming the same | Electricity | 0 | Active |
| US11257545B2 | Method of programming memory device and related memory device | Physics | 0 | Active |
| US11875862B2 | Memory including a plurality of portions and used for reducing program disturbance and program method thereof | Physics | 0 | Active |
| US11195590B2 | Memory including a plurality of portions and used for reducing program disturbance and program method thereof | Physics | 0 | Active |
| US11864379B2 | Three-dimensional memory and control method thereof | Physics | 0 | Active |
| US12165716B2 | Method of performing programming operation and related memory device | Physics | 0 | Active |
| US11423995B2 | Three-dimensional memory device programming with reduced disturbance | Physics | 0 | Active |
| US11568941B2 | Memory including a plurality of portions and used for reducing program disturbance and program method thereof | Physics | 0 | Active |
| US12354668B2 | Programming method for semiconductor device and semiconductor device | Physics | 0 | Active |
| US11626170B2 | Method and memory used for reducing program disturbance by adjusting voltage of dummy word line | Electricity | 0 | Active |
| US11594288B2 | Memory including a plurality of portions and used for reducing program disturbance and program method thereof | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.