Patent · US Active

RRAM structure with only part of variable resistive layer covering bottom electrode and method of fabricating the same

US11257864B2 · kind B2 · utility

3Cited by
6References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 18, 2020
Grant dateFeb 22, 2022
Priority date
Expiry dateFeb 18, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N70/8833

Abstract

An RRAM structure includes a substrate. The substrate is divided into a memory cell region and a logic device region. A metal plug is disposed within the memory cell region. An RRAM is disposed on and contacts the metal plug. The RRAM includes a top electrode, a variable resistive layer, and a bottom electrode. The variable resistive layer is disposed between the top electrode and the bottom electrode. The variable resistive layer includes a first bottom surface. The bottom electrode includes a first top surface. The first bottom surface and the first top surface are coplanar. The first bottom surface only overlaps and contacts part of the first top surface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.