Methods and structures for improved electrical contact between bonded integrated circuit interfaces
US11289421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2019 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Oct 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Composite integrated circuit (IC) device structures that include two components coupled through hybrid bonded interconnect structure. The two components may be two different monolithic IC structures (e.g., chips) that are bonded over a substantially planar dielectric and metallization layer. A surface of a metallization feature may be augmented with supplemental metal, for example to at least partially backfill a recess in a surface of the metallization feature as left by a planarization process. In some exemplary embodiments, supplemental metal is deposited selectively onto a metallization feature through an autocatalytic (electroless) metal deposition process. A surface of a dielectric material surrounding a metallization feature may also be recessed, for example to at least partially neutralize a recess in an adjacent metallization feature, for example resulting from a planarization process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.